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Altera_Forum's avatar
Altera_Forum
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15 years ago

Timequest results differ from Modelsim

So In Timequest I have a launch clock and a latch clock for some data. The latch clock is about a 0.2 ns delay after launch clock. It modelsim using the slow model netlist, same as timeques...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
15 years ago

If I understood correctly, you have two clocks output by fpga with a a phase differnece set to .2 ns then modelsim shows 2.2 ns.

I assume you can't actually measure quartus results but you have read the fitter report saying it achieved .2ns.

In that case you have an issue. One suggestion is that modelsim resolution must in ps for PLLs. I believe the default is ns. Try make it ps first.