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It is not about overheating but testing temperature effect by freezing and if it still fails try heating it with hot air. If design works in this test then it confirms timing issue as delays are changed by temp.
Other causes related to clk should be considered e.g. rate control, fifo overflowing etc...
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Problem solved.
It turns out that I've used an old project as basis, and this project had the pin AH22 labeled as 50 MHz Clock. According to the reference manual, this pin actually is 100 MHz for bottom port of DDR3. Using the correct 50 MHz Clock Pin (AN6) solved my problem! Thus, Timequest was never wrong at all!
Thank you for any help!
Honored Contributor
