Forum Discussion
Altera_Forum
Honored Contributor
8 years agoThanks for the quick answer. However, the real question was how does Quartus associate a particular virtual clock with a particular real clock when there are lots of real clocks? I assume this is done these ways:
1. The virtual clock is referring to inputs and outputs connected to logic clocked by the real clock and 2. The virtual clock and the real clock are in the same clock group and 3. All the other clocks are in other clock groups with -asynchronous between the groups. and then you could use -waveform to change the phase between the real and virtual clocks if required. Is this correct? Thanks!