Forum Discussion
Altera_Forum
Honored Contributor
14 years ago --- Quote Start --- Most of them are I/Os but there are also some internal clocks. This design was designed for the stratix III with the classic analyzer. I've just recently upgraded to the stratix IV. With the classic analyzer, I've managed to get by without much worrying about constraints. The design worked. Now, I can't get the design to work despite the fact that I have a faster speed grade device. The report says that there is one "false path". But these Clocks are not in any way involved in that section that I am observing the timing failures. --- Quote End --- Hi, only to be sure that I don't misunderstand something: You have a design on StratixIII , using the Classic Timing Analyzer which runs. Then you changed to StratixIV ( now you have to use TimeQuest, I believe) and now the design isn't running anymore, right ? Any hold time violations ? Kind regards GPK