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Altera_Forum
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14 years ago

Timequest makes timings but not the real stratix IV hardware

I am having problems making actual timings on the real hardware. I'm actually trying to upgrade from a stratix III to a stratix IV. The design works on a stratix III. After I've set up a ba...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
14 years ago

Thanks for the reply. No, not all paths are constrained. But there are just too many according to the report, but most of them should not be relevant to the problem at hand. The clocks that are involved in the circuitry are constrained and are making timings according to the tool. The only thing I'm not sure about is how the Quartus II handles the enable pins of the registers that are toggled for controlling the data rate.