Forum Discussion
CBehr
New Contributor
8 years agoTimeQuest: How do I eliminate the clock delay through a PLL from my timing budget for external IO?
I've got the following related constraints: set_clock_groups -asynchronous -group {input_clk_40} \ -group {pll_output_clk_50|Frac_PLL(eg.)} -group {pll_output_clk_50|divclk} create_clock -name vi...
KhaiChein_Y_Intel
Regular Contributor
7 years agoSure. I will answer in the new thread