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Altera_Forum
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11 years ago

Timequest for beginers

Hi,

I'm involved in an international open source Software Defined Radio project that uses Altera FPGAs (www.openhpsdr.org (http://www.openhpsdr.org/)). We are currently encouraging our members to contribute to FPGA development.

Many of our members are very experienced C/C++/C# programmers but have not been exposed to FPGA coding before. One issue we find is the steep learning curve for such programmers when starting to use Timequest.

In which case we have written a user guide, aimed at beginners, called "A standardized procedure for closing timing on openHPSDR FPGA firmware designs".

You can obtain a copy of the document here:

http://www.k5so.com/timingclosurefieldguide.pdf

We would welcome peer reviews by experienced Timequest users in order to continually improve this document.

Regards

philh

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  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    11 years ago

    --- Quote Start ---

    So I measure the relationship between the clock and the data with a scope and use that value for the set input delay?

    --- Quote End ---

    correct and that is the ideal.

    alternatively if you assume both board traces are identical and equal in length (data and clock) then you can ignore board delay and deduce offset from external device tCO. Then min = min tCO and max = max tCO