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Hi Pletz
Well that's the big problem: I don't know why my design sometimes does work and sometimes doesn't. I can make a very small change and after compilation it will not work correctly anymore. It must be some timing problems that are not detected by TimeQuest. Maybe it's just that the timing simulation can not exactly represent reality. That's why I wanted to make it more pessimistic by adding clock uncertainty.
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Hi Stefan,
I'm not sure, but I still believe your problem could be reset related. Your system reset is
generated by a block clock by clk6M25, but it is also used in blocks running at clk_50M.
That means you have valid paths between clk_50M and clk6M25. Are they re- synchronized ?
Another reason could be the statemachines itself. Are all states defined ?
Kind regards
GPK