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SrLam9's avatar
SrLam9
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7 years ago

TimeQuest Analyzer. False unconstrained clock?

Hi, In the timing analysis of my design, I have one unconstrained clock: csr_control_data_reg[0] which is the control register for the serial flash controller II IP core. The CSR is connected to the...
a_x_h_75's avatar
a_x_h_75
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7 years ago

I don't think the syntax of your remove_clock is correct. "-name" refers to a name that you have given to something in a timing constraints file, not the name of a signal.

Refer to the Tiemquest reference manual.

https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/manual/mnl_sdctmq.pdf

You may well have to create_clock (using the -name parameter) to tell Timequest to expect a clock and then to remove it - as per the example offered in the reference manual (page 2-54).

Failing that then a set_false_path may be the way to go.

Cheers,

Alex