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toczkows's avatar
toczkows
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3 years ago

TimeQuest ALTPLL wrong setup relation

Hi, recently I found some strange behaviour of timequest STA regarding simple design with PLL on Quartus Prime Lite. If there is simple data transfer between clock (i_CLK) and clock that's output ...
Nurina's avatar
Nurina
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3 years ago

Thanks.

To generate this, go to Project>Archive Project.


Regards,

Nurina


toczkows's avatar
toczkows
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3 years ago

simple example in attachment.

I had only access to old quartus version, but can be updated to newest one if needed.