toczkowsNew Contributor3 years agoTimeQuest ALTPLL wrong setup relation Hi, recently I found some strange behaviour of timequest STA regarding simple design with PLL on Quartus Prime Lite. If there is simple data transfer between clock (i_CLK) and clock that's output ...Show More
NurinaRegular Contributor3 years agoThanks.To generate this, go to Project>Archive Project.Regards,Nurina
toczkowsNew Contributor to Nurina3 years agosimple example in attachment. I had only access to old quartus version, but can be updated to newest one if needed.simple_example_forum.qar22 KB
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