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toczkows's avatar
toczkows
Icon for New Contributor rankNew Contributor
3 years ago

TimeQuest ALTPLL wrong setup relation

Hi, recently I found some strange behaviour of timequest STA regarding simple design with PLL on Quartus Prime Lite. If there is simple data transfer between clock (i_CLK) and clock that's output ...
Nurina's avatar
Nurina
Icon for Regular Contributor rankRegular Contributor
3 years ago

Hi,


Shifting a clock will change the setup and hold relationship because then the launch and latch edge will be changing. By default, TimeQuest will choose the nearest latch edge and this results in a different setup & hold relationship. If the setup & hold relationship calculated by TimeQuest is not what you want, you should use set_multicycle_path.


Regards,

Nurina