Forum Discussion
Altera_Forum
Honored Contributor
13 years agoHi,
that would be the specification of a MII PHY from the FPGA point of view (as taken from PHY's datasheet - that' the incoming clock/data alignment). 180° makes sense, I don't remember exactly why I used 90°.... I guess because most of the Altera AN use 90° shift with PLLs...