Forum Discussion
For the optimization issue you can try add 'preserve' attribute to the signal to prevent it from being optimized away.
Thank you for a hint but I'm using 'keep' attribute to avoid optimization. According to the description in a Quartus template, 'keep' should be used for combinationl circuits and 'preserve' for registers. In my case, I care about preserving the fast carry chain in the adder, so combinational circuit. As noted in my original post, 'keep' attribute indeed allows me to implement this circuit but it also causes additional logic to appear to produce fixed logical values for one of the inputs of the adder.
Overall, I would simply like to get a circuit like the one shown in the Arria 10 documentation describing the ALM arithmetic mode (with two flip-flops connected simultaneously to one output from the adder): https://www.intel.com/content/www/us/en/docs/programmable/683461/current/arithmetic-mode.html.