Time Quest SDC Command

What you've described sounds like the right way to do it. Are there any warning messages? The one I would expect is that it couldn't find a path from the master clock(input) to the generated clock(output) and hence the latency would be 0ns. An example might be if you're going through a ripple clock register before sending the clock out, or somehting like that(which would be solved by adding a generated clock to the ripple clock register).