Forum Discussion
ymiler
Contributor
4 years agoYes ,
Enclosed
ymiler
Contributor
4 years agoHi
I have more details about the problem :
My project includes - LVDS SERDES Intel FPGA IP - the problem occur when I sign the checkbox : Use the CPA block for improved periphery-core timing -
Then , the Quratus crash at the place process
Yishay