The best way to test an IP core

Hello BadOmen,

Thank you for the reply! I think what you are saying is to create the testbench Qsys system and the simulation model. And instead of adding a C code to test from NIOS II, test the IP by adding testcases in the testbench file (Verilog). Did I understand this correctly? I have seen an altera wiki link http://www.alterawiki.com/wiki/simulating_designs_with_lower-level_qsys_systems

which shows an example to test (but not testing an IP core, it has a simple counter design) from an application code. Is there any other example which shows the testing of IP in isolation (using the bus functional models) ?

Thank You,

Akhil