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Altera_Forum
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9 years ago

Testbench

Hi everyone I need to help for my graduate thesis. I am working on aes 128 cipher and i had a code but i need a simulation and testbench . how can i do them . pls help me . I appretiated for your ...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
9 years ago

my ports are

entity key_gen is

port (roundkey: in STD_LOGIC_VECTOR(127 downto 0);

round: in round_type;

DATAOUT: out STD_LOGIC_VECTOR(127 downto 0));

end entity key_gen;

I need to testbench code for modelsim simulation.