Forum Discussion
Tere is error when creat Traffic Generator Connection
Hi all,
I face one problem, when I use EMIF debug toolkit to test DDR4 board which is build by myself, and I get one example design under customize the requirement of the DDR4 which I need when I generate the EMIF IP. I compiled this example, and downloading .sof file into fpga. I open the EMIF debug toolkit and can create Memory Interface Connection, I can make sure that the calibration is completed and successful and can re-calibrate the IP through downloading the intruction through the EMIF DEBUG TOOLKIT to the IP. But when I creat Traffic Generator Connection, there is always one error that blocks me to do next operation.
About the information: I enable " Add EMIF Debug Interface" and select " Use configurable Avalon traffic generator 2.0" & Export Traffic Generator 2.0 configuration interface.
The error picture :
So about my problem, could one give me some advice?
Brs,
Lambert
6 Replies
- sstrell
Super Contributor
What is your target device and what version of Quartus are you using?
- lambert_yu
Contributor
hi sstre,
The target device is arria 10 10ax115n2f45e1sg
generated EMIF IP VersiOn :quartus pro 17.1
debug version :quartus pro 17.0
brs,
lambert
- sstrell
Super Contributor
The Traffic Generator 2.0 (TG2) is not supported in that old version of Quartus. You need to use at least 20.1 Pro.
Why it was an option in older versions of the tools is a mystery.
This training goes into detail on TG2. The training refers to Agilex, but I think it's supported in Arria 10 as well:
https://www.intel.com/content/www/us/en/programmable/support/training/course/oagmem104.html