TEMPERATURE SENSOR IP in STRATIX10 SX , READ INCORRECT VALUE

JwChin,

The larger issue is that even if I can get your image working, that just proves that the temperature and Voltage IP can work, which i assume it does. I need the temperature and voltage IP to work in MY design and as of now that is not the case. You have my simple design and it calls out the two IP blocks and makes sure to NOT access them at the same time. I also included a lot of delay timing so that should not be an issue. I dont know if the issue is due to be instantiating in VHDL versus Verilog, or if there is so other issue with how I am using the quartus software. Would it be possible for me to build my design for your test setup, all I would need is the a sample .qsf file from you with the pin locations for clock and reset. I can do everything automatically and you can see the output in signal tap.

FYI, I tried regenerating your design for our setup using the new stp file you sent me and I could not get the signaltap file to come up no matter what I tried. It kept saying that it was incompatible even though I made sure that the signal tap file was directly called out in the project file list and enabled and I definitely recompiled the design.

I am having an Arrow FAE come by tomorrow and I will set him up with your design and see if he can figure it out. I will also give him my design so he can work with other FAEs to see what is going on.

I fully suspect that there is an IP issue and that the two blocks are not interacting together correctly. In all honesty, since we are talking to a single ADC device, I dont understand why there isn't just one IP block and we address the voltage and temperature devices all in one.