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- Altera_Forum
Honored Contributor
This is not quite what you are asking, but I typically use the .sdc syntax:
This checks to see if a clock has been used in a design, and if it has, then assigns a default clock contraint, and group. Cheers, Daveset ports if { == 1} { set clkin_50MHz_period 20 set name clkin_50MHz puts " ==> S4GXDK: constrain clock $name" create_clock -period $clkin_50MHz_period -name $name set_clock_groups -exclusive -group $name }