Forum Discussion
Altera_Forum
Honored Contributor
15 years agoHello,
I got exactly the same problems: The system works well with one custom SOPC module added to the system, but with an other one the system ID and time stamp cannot be read from the board (DE2-115 or DE3 => it's not caused by the board but by the software/HDL-design). The custom SOPC module of course compiles correctly. But it is very large in size (2.500 lines of verilog code). Is there maybe a practical limitation of logic size due to delay times? (I don't really belief that...) And why does the nios processor not respond anymore, even if the module isn't working correctly? => How can a faulty memory mapped slave module affect the processor? The mm-interface itself cannot be wrong because it is simulated, recognised correctly by the SOPC builder and used by me in some other working designs "copy-and-paste". Maybe someone can give me a hint where to search further? Thanks a lot in advance...