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Altera_Forum
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9 years ago

Synthesize multipliers on distributed logic?

Hello, I want to synthesize a symmetric FIR filter with 116 taps. Thus, the design should infer 58 multipliers. As I start the design flow for a Cyclone V (5CSEMA4U23C6) with 84 DSP blocks, everyt...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
9 years ago

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But does it also mean, that a multiplier cannot be synthesized to the distributed logic?

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In Assignments->Settings->Compiler Settings->Advanced Settings (Synthesis) you can set dsp block balancing to logic elements, but then it will only infer LEs. You may want to experiment with these settings.