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Altera_Forum
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9 years ago

Synthesize multipliers on distributed logic?

Hello, I want to synthesize a symmetric FIR filter with 116 taps. Thus, the design should infer 58 multipliers. As I start the design flow for a Cyclone V (5CSEMA4U23C6) with 84 DSP blocks, everyt...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
9 years ago

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But, if I select the 5CSEBA2U19C8 with 36 DSP Blocks, nothing behaves as expected. The tool reports a correct usage of 58 DSP blocks (analysis and synthesis). Further, the fitter reports a usage of 36 DSP blocks and a total number of 58 fixed point multipliers. Consequently, that means that 22 multipliers are built on distributed logic. The logic utilization is 1437/9430 ALM (15%).

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I guess that the multiplications fit into an 18 x 18 multiplier, and Quartus can construct up to 72 of those out of the 36 available DSP blocks.