synthesis error 10818

--- Quote Start ---

is this below any good?

always @(posedge clk, posedge rst )
begin
    //result <=0;  
    if (rst) 
        result <=0;
    else if (~ena) 
        result <= 0;
    else
       result <= 1;
end

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I believe most of the FPGA synthesis tools have a problem understanding the structure of a MUX and a FF when the "always @(.... " structure has a default assignment outside the if/else-if/else structure. When I have to add a default assignment, I generally do it as follows.

reg result_comb;
reg result;
always @(*)
begin
  result_combo = 0;
  if(cond1)
    result_combo = 1;
  else if (cond2)
    result_combo = 0;
end
always @(posedge clk, posedge rst)
begin
  if(rst)
    result <= 0;
  else
    result <= result_combo
end

This may not satisfy the "minimal patch" requirement, but it works