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Altera_Forum
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18 years ago

switching Bidirectional I/Os in FPGA

Hi, My project requires switching of SDRAM control and data signals between two DSP processors. Well, both the processors have their own SDRAM controller and signals. The Cyclone II FPGA is use...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
18 years ago

You cannot have two net assignments to the same signal (fpga_sdram_d), try combining them into a single assign statement. Check your Quartus warning messages. Maybe combine all assigns into a combinatorial 'case' statement?