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Altera_Forum
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18 years ago

Suppress Warnings like 14110

Eploring a new design, I find (among others) warnings like this : Warning (14110): No clock transition on "pcie_top_4x125:pci .... register due to stuck clock or clock enable" which I w...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
18 years ago

In the current version of Quartus II, the advanced message settings dialog only controls messages that are generated during the Analysis & Elaboration of your Verilog and VHDL. These messages are called hdl messages and have IDs between 10000 and 11000. Quartus II generates Message 14110 during logic optimization. I wouldn't be surprised if the next version of Quartus II allows you to suppress all Message IDs in the Advanced Message Settings dialog.

Are you sure you want to suppress that warning globally? Having a register with a stuck clock or enable sounds pretty scary! Is this warning coming from your own design logic or IP?

Josh