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shige8's avatar
shige8
Icon for New Contributor rankNew Contributor
5 years ago

Stratix-IV QSYS generation Error

Hello,

I am using Quartus Prime Standard 20.1 installed on Ubuntu 18.04 with Stratix IV EP4SGX230 development kit. I always hit HDL generation error at same point as long as I include the DDR3 controller in the design.

1. Load QSYS file of the NIOS processor with MMU design example for Stratix-IV GX FPGA Development Kit.

4SGX230 Nios II MMU zip file (14.1)

2. Generate HDL and failed in a minute.

...

Info: cpu: Done RTL generation for module 'qsys_ghrd_4sgx230_cpu_cpu'
Info: cpu: "cpu" instantiated altera_nios2_gen2_unit "cpu"
Info: pll0: "ddr3_top" instantiated altera_mem_if_ddr3_pll "pll0"
Info: p0: Generating clock pair generator
Info: p0: Generating qsys_ghrd_4sgx230_ddr3_top_p0_altdqdqs
Info: p0:
Info: p0: *****************************
Info: p0:
Info: p0: Remember to run the qsys_ghrd_4sgx230_ddr3_top_p0_pin_assignments.tcl
Info: p0: script after running Synthesis and before Fitting.
Info: p0:
Info: p0: *****************************
Info: p0:
Info: p0: "ddr3_top" instantiated altera_mem_if_ddr3_phy_core "p0"
Info: m0: "ddr3_top" instantiated altera_mem_if_ddr3_afi_mux "m0"
Error: s0: Cannot find sequencer/sequencer.elf
Error: s0: An error occurred while executing "error "An error occurred"" (procedure "_error" line invoked from within "_error "Cannot find $seq_file"" ("if" then script line 2) invoked from within "if {[file exists $seq_file] == 0} { _error "Cannot find $seq_file" }" (procedure "alt_mem_if::util::seq_mem_size::get_max_memory_usage" line 14) invoked from within "alt_mem_if::util::seq_mem_size::get_max_memory_usage [file join "sequencer" "sequencer.elf"" invoked from within "set calc_mem_size [alt_mem_if::util::seq_mem_size::get_max_memory_usage [file join "sequencer" "sequencer.elf"]]" ("if" then script line 2) invoked from within "if { !$do_only_rw_mgr_mc && !($bfm_mode || $hps_mode)} { set calc_mem_size [alt_mem_if::util::seq_mem_size::get_max_memory_usage [file join "sequenc..." (procedure "generate_qsys_sequencer_sw" line 943) invoked from within "generate_qsys_sequencer_sw $prepend_str $protocol $pre_compile_dir $fileset $inhdl_dir $rdimm $lrdimm 0 0 $nios_hex_file_name $ac_rom_init_file_name ..." invoked from within "set seq_mem_size_list [generate_qsys_sequencer_sw $prepend_str $protocol $pre_compile_dir $fileset $inhdl_dir $rdimm $lrdimm 0 0 $nios_hex_file_name ..." ("if" else script line 2) invoked from within "if {[::alt_mem_if::util::qini::qini_value alt_mem_if_seq_size_request 0] > 0} { set seq_mem_size [::alt_mem_if::util::qini::qini_value alt_mem_if_se..." (procedure "alt_mem_if::gen::uniphy_gen::generate_qsys_sequencer" line 238) invoked from within "alt_mem_if::gen::uniphy_gen::generate_qsys_sequencer "${name}" $protocol $tmpdir $fileset {}" invoked from within "set qsys_sequencer_files_list [alt_mem_if::gen::uniphy_gen::generate_qsys_sequencer "${name}" $protocol $tmpdir $fileset {}]" (procedure "alt_mem_if::gen::uniphy_gen::generate_sequencer_files" line 3) invoked from within "alt_mem_if::gen::uniphy_gen::generate_sequencer_files $name "DDR3" $tmpdir QUARTUS_SYNTH" invoked from within "foreach generated_file [alt_mem_if::gen::uniphy_gen::generate_sequencer_files $name "DDR3" $tmpdir QUARTUS_SYNTH] { set file_name [file tail $genera..." (procedure "generate_synth" line invoked from within "generate_synth qsys_ghrd_4sgx230_ddr3_top_s0"
Info: s0: "ddr3_top" instantiated altera_mem_if_ddr3_qseq "s0"
Error: Generation stopped, 239 or more modules remaining
Info: qsys_ghrd_4sgx230: Done "qsys_ghrd_4sgx230" with 107 modules, 80 files
Error: qsys-generate failed with exit code 1: 3 Errors, 4 Warnings
Info: Finished: Create HDL design files for synthesis

I could reproduce the same error by creating the simple design by just adding clk_in module and DDR3. Does anybody experience the similar failure and what could fix this issue ?

5 Replies

  • RichardT_altera's avatar
    RichardT_altera
    Icon for Super Contributor rankSuper Contributor
    5 years ago

    May I know is this error occurs with the recent Quartus standard version 20.1?
    Do you able to generate HDL using the older Quartus standard version e.g. 18.1?

    • RichardT_altera's avatar
      RichardT_altera
      Icon for Super Contributor rankSuper Contributor
      5 years ago

      Hi,

      We do not receive any response from you to the previous question/reply/answer that I have provided. Please post a response in the next 15 days to allow me to continue to support you. After 15 days, this thread will be transitioned to community support. The community users will be able to help you with your follow-up questions.

      Best Regards,

      Shyan Yew

    • shige8's avatar
      shige8
      Icon for New Contributor rankNew Contributor
      5 years ago

      Hi ShyanYew

      I tried on several version of Quartus Prime and all of them hit the same issue.

      Quartus 20.1 Standard / Stratix-IV on Ubuntu 18.04

      Quartus 19.1 Standard / Stratix-IV on Ubuntu 18.04

      Quartus II 14.1/ Stratix on Ubuntu 18.04

      Thanks,

      Shige

      • shige8's avatar
        shige8
        Icon for New Contributor rankNew Contributor
        5 years ago

        Windows 10.0.19041.508

        Quartus 20.1.0 Build 711 Standard

        I tried to generate the DDR3 module in Quartus 20.1 on Windows 10. The results are different with and without WSL installed. Both failed to generate the HDLs at the end.

        1. Without WSL as suggested FB: 533911/2205701105

        Error: s0: Error during execution of "{C:/intelfpga/20.1/quartus/../nios2eds/Nios II Command Shell.bat} make all 2>> stderr.txt": child process exited abnormally
        Error: s0: Execution of command "{C:/intelfpga/20.1/quartus/../nios2eds/Nios II Command Shell.bat} make all 2>> stderr.txt" failed
        Error: s0: child process exited abnormally
        Error: s0: Cannot find sequencer/sequencer.elf
        Error: s0: An error occurred while executing "error "An error occurred"" (procedure "_error" line invoked from within "_error "Cannot find $seq_file"" ("if" then script line 2) invoked from within "if {[file exists $seq_file] == 0} { _error "Cannot find $seq_file" }" (procedure "alt_mem_if::util::seq_mem_size::get_max_memory_usage" line 14) invoked from within "alt_mem_if::util::seq_mem_size::get_max_memory_usage [file join "sequencer" "sequencer.elf"" invoked from within "set calc_mem_size [alt_mem_if::util::seq_mem_size::get_max_memory_usage [file join "sequencer" "sequencer.elf"]]" ("if" then script line 2) invoked from within "if { !$do_only_rw_mgr_mc && !($bfm_mode || $hps_mode)} { set calc_mem_size [alt_mem_if::util::seq_mem_size::get_max_memory_usage [file join "sequenc..." (procedure "generate_qsys_sequencer_sw" line 943) invoked from within "generate_qsys_sequencer_sw $prepend_str $protocol $pre_compile_dir $fileset $inhdl_dir $rdimm $lrdimm 0 0 $nios_hex_file_name $ac_rom_init_file_name ..." invoked from within "set seq_mem_size_list [generate_qsys_sequencer_sw $prepend_str $protocol $pre_compile_dir $fileset $inhdl_dir $rdimm $lrdimm 0 0 $nios_hex_file_name ..." ("if" else script line 2) invoked from within "if {[::alt_mem_if::util::qini::qini_value alt_mem_if_seq_size_request 0] > 0} { set seq_mem_size [::alt_mem_if::util::qini::qini_value alt_mem_if_se..." (procedure "alt_mem_if::gen::uniphy_gen::generate_qsys_sequencer" line 238) invoked from within "alt_mem_if::gen::uniphy_gen::generate_qsys_sequencer "${name}" $protocol $tmpdir $fileset {}" invoked from within "set qsys_sequencer_files_list [alt_mem_if::gen::uniphy_gen::generate_qsys_sequencer "${name}" $protocol $tmpdir $fileset {}]" (procedure "alt_mem_if::gen::uniphy_gen::generate_sequencer_files" line 3) invoked from within "alt_mem_if::gen::uniphy_gen::generate_sequencer_files $name "DDR3" $tmpdir QUARTUS_SYNTH" invoked from within "foreach generated_file [alt_mem_if::gen::uniphy_gen::generate_sequencer_files $name "DDR3" $tmpdir QUARTUS_SYNTH] { set file_name [file tail $genera..." (procedure "generate_synth" line invoked from within "generate_synth ddr3test_mem_if_ddr3_emif_0_s0"
        Info: s0: "mem_if_ddr3_emif_0" instantiated altera_mem_if_ddr3_qseq "s0"

        2. WSL installed as directed in the Installation Documents

        It didn't fail at the above location but proceeded to generate the makefile. Than it failed to compile the alt_dcache_flush_all.c for some reasons. The nios2-elf-gcc.exe may be missing but I cannot verify it because the temporary folder is removed after the failure.

        Error: s0: Info: Building /mnt/c/Users/user/AppData/Local/Temp/alt8546_7808681284429980738.dir/0005_s0_gen/qsys_pre_compile/ddr3wsl_mem_if_ddr3_emif_0_s0_software/sequencer_bsp
        Error: s0: make --no-print-directory -C /mnt/c/Users/user/AppData/Local/Temp/alt8546_7808681284429980738.dir/0005_s0_gen/qsys_pre_compile/ddr3wsl_mem_if_ddr3_emif_0_s0_software/sequencer_bsp
        Error: s0: Compiling alt_dcache_flush_all.c...
        Error: s0: nios2-elf-gcc.exe -xc -MP -MMD -c -I./HAL/inc -I. -I./drivers/inc -pipe -D__hal__ -DALT_NO_C_PLUS_PLUS -DALT_NO_CLEAN_EXIT -D'exit(a)=_exit(a)' -DALT_NO_EXIT -DALT_USE_DIRECT_DRIVERS -DALT_NO_INSTRUCTION_EMULATION -DALT_USE_SMALL_DRIVERS -DSMALL_C_LIB -DALT_SINGLE_THREADED -Os -g -Wall -mno-hw-div -mno-hw-mul -mno-hw-mulx -mgpopt=global -o obj/HAL/src/alt_dcache_flush_all.o HAL/src/alt_dcache_flush_all.c
        Error: s0: Makefile:539: recipe for target 'obj/HAL/src/alt_dcache_flush_all.o' failed
        Error: s0: Makefile:844: recipe for target '/mnt/c/Users/user/AppData/Local/Temp/alt8546_7808681284429980738.dir/0005_s0_gen/qsys_pre_compile/ddr3wsl_mem_if_ddr3_emif_0_s0_software/sequencer_bsp-recurs-make-lib' failed
        Error: s0: make[1]: Leaving directory '/mnt/c/Users/user/AppData/Local/Temp/alt8546_7808681284429980738.dir/0005_s0_gen/qsys_pre_compile/ddr3wsl_mem_if_ddr3_emif_0_s0_software/sequencer'
        Error: s0: Makefile:12: recipe for target 'elf' failed
        Error: s0: child process exited abnormally
        Error: s0: Cannot find sequencer/sequencer.elf
        Attaching the QSYS script and logs.
        Thanks,
        Shige
  • shige8's avatar
    shige8
    Icon for New Contributor rankNew Contributor
    5 years ago

    This issue is resolved by adding tool chains to the system. We may still have an issue with Windows 10 but at least the original issue is unblocked.

    System : Ubuntu 18.04 LTS
    Software : Quartus Prime Standard 20.1 / Stratix IV GX
    Project : 4SGX230 Nios II MMU (Altera Reference)

    sudo dpkg --add-architecture i386
    sudo apt update
    sudo apt install build-essential

    Now we can generate the HDL for qsys_ghrd_4sgx230 with no error.

    Thanks,

    Shige