Forum Discussion
Altera_Forum
Honored Contributor
14 years ago --- Quote Start --- This works fine. In some cases you'll get a warning about the possibility of increased jitter (I think it was due to cascading of PLLs). Try it on the board and see how you go. Cheers, Dave --- Quote End --- That's what I did in the compiled project and got those fitting errors. Is there any other constraints I need to add to make it work? Thanks, Hua