Stratix IV GXB Refclk IO standard settings

Hi Dave,

I would like to use the refclk input as the clock source for a pll in FPGA fabric and use one of the derived clock as a reference clock of a transceiver. Do you think that will be a problem?

Stratix IV handbook seems to suggest that this is feasible. On vol 2, section I, chapter 2, p.g. 2-5, it seems to have both the clock path to fabric and the clock path back to the transceiver.

In p.g. 2-8, ITB section, the last sentence from paragraph 1 confirms the clock path to fabric.

In p.g. 2-9, the first paragraph confirms the clock path to transceiver.

Am I reading this right? or is it that I have to do something to enable all these?

Thanks,

Hua