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Altera_Forum
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7 years ago

[STA] Timing Constraints for synchronizers

Hi All, What timing constraints should be applied for the synchronizers? 1) false path from a clock pin of the first flop to D-pin of the second/last flop 2) what about ...
Altera_Forum's avatar
Altera_Forum
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7 years ago

so, a false path or max_delay constraint should be applied? I believe they cannot be placed both together ...