Forum Discussion
Altera_Forum
Honored Contributor
15 years agoHey thanks everyone for the input!
Kevin - I totally agree with you, meeting timing is always the worst part of any design for me. I am hoping someday I will have the moment when it all becomes clear! I ended up using the generated clock - this seems to work better for me and as others have said it is standard across vendors, as opposed to the -reference_pin option. I have one more question for the timing gurus here: I have a Max II cpld that talks to a Sharc uP over a parallel data bus with RDN and WRN strobe signals to trigger bus reads and writes. One of the things the CPLD must do is freeze the bus by deserting a line called BUSS_ACK when it sees a WRN strobe and the address on the address line is within a certain range. My code looks something like this: if wrn"event and wrn=0 then if a = X"0001" then buss_ack = "0" end if end if the problem is that the address sets up 3 ns before the strobe and is valid throughout the cycle. I always miss the address. I have no idea how to write a constraint for the valid window of the address. I have tried set_input_delay min=-3ns but this does not seem to work. any ideas? Thanks! Jason