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Altera_Forum
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17 years ago

SOPC Component Editor

In a Nios processor system, in order to create a custom component to read a 16 bit word from a peripheral, I have used an 'Avalon-MM Tristate Slave' template from the SOPC builder (Ver 8.0) component...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
17 years ago

I tried specifying a single address line (even though section 5.1 (Table 5.1) of the Avalon Spec suggests that it isn't required). The allocated address space is still 1K - is this possibly just a feature of the Avalon bus as Vizziee suggests in his reply?

A standard PIO port seems to allocated 16 address locations regardless of the width specified.

Thanks for the reminder about the address mapping to the peripheral address lines.

Tim