Hi Sacha,
Actually i design a hardware written in verilog and software written in c++ code of encryption and decryption(e&c). However, i have no idea how to put it all together. e.g. How can i let the input(from console) go to hardware instead of software or vice versa? or pass the output(result) to be display
Regarding the signal, i think that u misunderstand my words. In sopc, when you click to add a new component, there is a signal tab that list out the input and output port of ur design(verilog or vhdl). I don't understand on the type of signal to be selected for input and output of my design.