Single multiplier takes up a whole DSP block for

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Have you tried instantiating the multipliers from the IP Catalog instead of using code inference?

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No.

I preferred pure HDL since I want to parameterize the multiplier with generics during compilation.

entity multiplier is
generic 
(
    LOCATION_FIRST_RESULT_BIT : natural ;
    WIDTH_A : positive  ;
    WIDTH_B : positive  ;
    WIDTH_RESULT  : positive  
) ;
port 
(
    IN_A :   in  std_logic_vector ( WIDTH_A - 1 downto 0 ) ;  
    IN_B :   in  std_logic_vector ( WIDTH_B - 1 downto 0 ) ;  
    
    OUT_RESULT :   out std_logic_vector ( WIDTH_RESULT - 1 downto 0 ) 
) ;
end entity multiplier ;
architecture rtl_multiplier of multiplier is 
signal  signed_multiplier_result  : signed ( WIDTH_B + WIDTH_A - 1 downto 0 ) ;
begin 
    signed_multiplier_result <=  signed ( IN_B ) * signed ( IN_A ) ;
    OUT_RESULT <=  std_logic_vector ( signed_multiplier_result ( WIDTH_RESULT + LOCATION_FIRST_RESULT_BIT - 1 downto LOCATION_FIRST_RESULT_BIT ) ) ; 
    
end architecture rtl_multiplier ;