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Altera_Forum
Honored Contributor
17 years ago'X' in std_logic doesn't mean don't care - it means "Forcing Unknown" - i.e. the simulator is trying to drive a '1' or '0' onto the signal but it can't determine which. This can be for several reasons such as putting 'U' into an arithmetic function; but very commonly it can be because you have two drivers for one signal - e.g. two processes which both try and drive the same signal. In logic terms this is like wiring up the outputs of two gates or registers together - the wire will be driven to some value as one or other of the gates is likely to be stronger than the other, but whether the high driving gate is stronger than the low driving one is unpredictable: so in simulation you end up with 'X'.
Parrado is on the ball with the advice of "buffer" direction. I would avoid this as in VHDL pre-2002 buffer ports could only be connected to other buffer ports - i.e. once you start with it you have to propagate the "buffer" all the way up. Use an internal signal (say clkOut_int) and then somewhere in your code apply this to the output: clkOut <= clkOut_int; Make this the only assignment to the output! I would have a look at your synthesis output as the synthesis tool may be getting confused. You need to be very strict and if you want a register then put everything inside the clk'event bit:
process(clk)
begin
-- don't put anything here
if clk'event and clk = '1' then
-- put your code here
end if;
-- don't put anything here
end process; Read the Altera's coding style document: http://www.altera.com/literature/hb/qts/qts_qii51007.pdf?gsa_pos=1&wt.oss_r=1&wt.oss=coding%20style There are some slight variations if you want asynchronous resets and/or clock enables, but you need to be very strict with your code to get registers right. You may find with your code as it is that you are inferring a register and a separate latch or combinatorial function which are being wired up together to give your 'X' output - a guess but either way your code will give you problems as it is. Good luck