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Altera_Forum
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13 years ago

simulation problem

Hallo,

i started with fpga programming and want to create a simple rs 232 communication. My programm doesn't work yet, so i want to simulate it. But I do not have a lot of experience in it.

I wrote an testbench for the receiver module. The module creates an internal clock and has some outputs. When i run my testbench (test_receiver), i see the external clock and RXD in modelsim. All outputs and the internal clock are undefined (red lines), i don't know why.

When i programm the fpga and test the communication, it answers, when i send some data to the receiver module, wrong but it answers .. :) So i think, i have a mistake in my testbench or some missing adjustment. I hope anyone can help me. Thank you.
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