simulation from schematic file

Hello ThePancake,

I tried to replace the bdf file by the vhd translated one in the project, but it appears some problems with the data types :

In the compteur's file, the counter variable is defined as integer range. After the translation from bdf, the corresponding variable is defined as std_logic_vector, and i used the same data-type in the test bench file.

So in the errors given by ModelSim Altera is coherent with :# ** Failure: (vsim-3807) Types do not match between component and entity for port "n".# Time: 0 ps Iteration: 0 Instance: /test_commande/inst_com/b2v_inst1 File: D:/user/noel/Enseignement/Cours/archi_systeme/doc_etudiants/Quartus/TP1/compteur_commande_bdf/compteur.vhd Line: 13# Fatal error in Architecture a_compteur at D:/user/noel/Enseignement/Cours/archi_systeme/doc_etudiants/Quartus/TP1/compteur_commande_bdf/compteur.vhd line 30# while elaborating region: /test_commande/inst_com/b2v_inst1# Fatal error in Architecture a_compteur at D:/user/noel/Enseignement/Cours/archi_systeme/doc_etudiants/Quartus/TP1/compteur_commande_bdf/compteur.vhd line 30# while elaborating region: /test_commande/inst_com# Fatal error in Process line__36 at D:/user/noel/Enseignement/Cours/archi_systeme/doc_etudiants/Quartus/TP1/compteur_commande_bdf/test_commande.vhd line 36# while elaborating region: /test_commande

This is disappointing because simulating such systems was very easy in the previous version, but i'm steel new with this one, so ...

Thanks, for your help.

EON