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TMayd's avatar
TMayd
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7 years ago

Simulating Altera IP Cores in Quartus Prime Lite 16.1 (or beyond)

Hi, I am working with a MAX10 and have instantiated the Soft LVDS core. I would like to use ModelSIM (the starter edition set up with NativeLink directly from Quartus) to simulate the behavior. Howev...
TMayd's avatar
TMayd
Icon for Occasional Contributor rankOccasional Contributor
7 years ago

Hi Vikas,

​

I​ have insantiated the module in my top level design. From the errors in modelsim and when I have tried other Altera IP (which also do not work, such as the LPM counter) I get an error in modelsim that seems to indicate that ModelSIM can't find the path to the verilog underlying module, such as the LPM_counter. Even though I believe my nativelonk is set up correctly.

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Tyler​