simplest way to make a pin high or low in verilog

module fpga_main {
   out0,
   out1,
   // more i/o pins
};
output out0;
output out1;
assign out0 = 1'b0;  //pin low
assign out1 = 1'b1;  //pin high
// other code
endmodule

Then use Quartus pin assignment feature to route out0 and out1 signals to proper fpga pins