Forum Discussion
Altera_Forum
Honored Contributor
9 years agoThanks, Bob, for this clear advice.
Download speed is not yet an issue; I'm studying 720p/1080p images first. "Use a UART" includes implementing a device driver / ISR for Nios II. I guess I'll follow https://www.altera.com/content/dam/altera-www/global/en_us/pdfs/literature/an/an459.pdf. That teaches how to connect my starter kit's USB port to the FPGA. It remains to: 1) Set up a terminal emulator to send a TIF/BMP file from the development PC's disk drive to the USB blaster / UART emulator 2) Write Nios code to format the received bits as the 4-byte 0/R/G/B words in SDRAM, as expected by the Frame Reader core. Is there anything else to consider? Am I making this too complicated? Implementing a minimal FPGA pipeline to display the downloaded file via the HDMI TX port on the starter kit seems relatively straightforward. It seems to me that pretty much all you guys out there who've used a TerasIC C5G dev kit would have solved this already. Why would we each roll our own? Cheers --todd