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Altera_Forum
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11 years ago

Signaltap State-Based Triggering Flow

Hello, i've read this page: http://www.altera.com/support/examples/on-chip-debugging/signal-tap/signaltap2-design-examples.html and the Handbook. But I've still two questions. When is...
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Altera_Forum
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11 years ago

I find it just easier to add detection logic in your RTL. Then you know for sure when odd conditions over several clock cycles have occured.

You can use the syn_keep attributes on registers so you can then connect them to signaltap.