Note that Quartus does run static timing analysis on the SignalTap blocks, so you should get timing failures if there was a problem. (If you sampled the data in SignalTap with a clock that was asynchronous to the clock domain you were sampling from, then you wouldn't get errors because you had told static timing analysis the clocks aren't related and shouldn't be analyzed. But you've already said you're using the same clock.)
Another really strange thing is the asynch reset, which I'm guessing should be static through the process, isn't. If there were timing issues, a static signal would still show up static.
I've never heard of internal noise like you're describing. I really don't think that's the issue.
If there were noise on your JTAG lines, which is definitely possible, the symptoms I've seen are failure to communicate, i.e. more robust failures, not bad data. (I have a previous post on JTAG noise that is probably worth reading.)
So to sum it up, I'm kind of at a loss. If you do some more debugging and get more info, please post it.