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Altera_Forum's avatar
Altera_Forum
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14 years ago

Signaltap Not Usable

So I'm at the verge of pulling my hair off, thanks to the signaltap. Here's the thing, I probe a signal which I've set to be preserved with directives, and it's value is not what I expect it to be. So, I probe all the inputs to its function, and they are all correct, but still the value of the resulting signal is not. Here's how it is:

reg a /* synthesis preserve*/;

input b /* synthesis keep */;

input c /* synthesis keep */;

always@(*)

a = b & c;

So in signaltap I see that both b and c are 1, but a is shown as zero!!! Why?!! Why?! Why?!

Kaveh

2 Replies

  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    14 years ago

    Without "always" block,have u seen same singals in signal tap?? if same then excecuation is not going into always block

    Or just to experiment ,change the sensitivity of the always block like "posedge clk" something like that and see what is the effect or keep only always block,no condition within bracket check whether there is no frequency issues while setting into the signal tap sampling.

    May be "a" is one but just because of frequency mismatch,it is showing u "zero" on that particular time.

    So check for all these and if possible just for verification,make so small program regarding this and looks signals in singal tap.

    And even if not working,Dnt pull off your hair. ;)
  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    14 years ago

    thanks for the tips, it's in fact a clock triggered block, I'll take a look at frequency mismatch though, that might be the reason. Thanks,

    Cheers,

    Kaveh