Forum Discussion
Altera_Forum
Honored Contributor
Honored ContributorSignalTap II issue
Hello, Here is debounce state machine: module debounce_explicit(input clk, reset, sw, output reg db_level, db_tick); //symbolic state declaration
localparam
zero = 2'b...
Altera_ForumHonored Contributor
Honored ContributorHi,
I did not read all your posts but from firts glance you have timing related problems. First try to synchronize your SW signal to clk domain with a two-stage shift-register only then feed it to state machine. You can add state machine states in signaltap by clicking right mouse button and chossing "Add state machine nodes.."
