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Altera_Forum's avatar
Altera_Forum
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9 years ago

SignalTap II fails to acquire events

Hello, I'm using SignalTap II to debug and verify my Cyclone V SOC design. On the signal list there's an enumerated type VHDL FSM with 10 states. The FSM moves consecutively from one state ...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
9 years ago

I didn't change the default. So it's one hot...

I assumed Quartus implements a "safe FSM" even when no explicitly asked to do so (as long as it identify's it as an FSM - which it does in this case).

Also,

If no timing violations exist, what can cause such a thing to happen ?