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Altera_Forum
Honored Contributor
8 years agoSignalTap II - waiting for clock
Hi, I'm attempting to use SignalTap II to verify my design is running correctly. I have set the SignalTap signals to be from pre-synthesis to prevent my desired signals from being optimised out...
Altera_Forum
Honored Contributor
8 years ago --- Quote Start --- What does it mean "found it in assignment editor" ? Did you do the pin assignment of the mentioned clock? You should look into your board reference manual to get the pins reserved for reference clocks. --- Quote End --- I think I understand now. In Quartus Assignment editor, I assumed each of the port names were automatically assigned to the pins via some hidden constraints file. If I check the pin planner though, none of them are assigned nodes. There is no link. I will set my clock to a reference clock pin and report back. Thanks