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Altera_Forum's avatar
Altera_Forum
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17 years ago

SignalTap and (re-)compile time

I'm using SignalTap on a very large design which takes ~5hr to incrementally compile on some of the fastest machines available (3GHz dual cores with 32G memory, 12MB cache and 1300MHz FSB). I ...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
17 years ago

Signalprobe rather than Signaltap - that's exactly the answer I was looking for.

Assuming I can get it going, I'll post how long the ECO compile takes later.

Many thanks.