New Contributor
Super ContributorCLOCK_50 should not be in the node list. You already have that as the capture clock. I think perhaps you mean to put the 1Hz clock as the capture clock and have CLOCK_50 in the node list, but then the capture clock would be way too slow to capture CLOCK_50. So simply have the 1Hz clock as the capture clock and remove CLOCK_50 from the node list. With CLOCK_50 as the sampling clock, you're filling up the buffer long before there's even one cycle of the counter.
You also don't need the trigger in. Disable that.
New ContributorYes regarding the clock you are right. I was also thinking the same that may be my buffer is getting overwrite with 50 Mhz clock thats why i am only able to see one sample.
But disabling the trigger in so how the data acquisition will stop as i dont want any extra samples
New ContributorAs the reason i am testing trigger in because i want to run a C program on one of my design which have to stop after a particular condition is match or if all the lines of the code is executed. I dont want to stop sampling before that and i also dont want samples after that
