Forum Discussion
AAnch
New Contributor
7 years agoShortening NIOSII Simulation run time with FPGA SOC system as recommended in AN351
Hi, As described below i have simulated with NIOSII, RAM & JTAG UART qsys system. Compiled and simulated the example Hello World C code program. From the simulation i see that it takes around 2 ms to...
GuaBin_N_Intel
Contributor
7 years agoThere is not much setting you can set to reduce the simulation time. Try to enable this "enable_sim_optimize" in bsp setting "https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/hb/nios2/n2sw_nii5v2gen2.pdf, pg465