Forum Discussion
Altera_Forum
Honored Contributor
10 years ago --- Quote Start --- Please file an SR if there's a bug. (I would also suggest adding a synthesizable HDL file rather than just a snippet, so user's don't have to do it and you're more likely to get someone to try it out) I think you're building a ton of 1024:1 muxes, which is going to be really large and slow(I'm sure there is common logic for a lot of it, but it's still not good). --- Quote End --- Quartus should implement multi-level logic with 2048:1024, 1024:512, 512:256 etc.. to get acceptable performance. I filled an SR. It seem that function right_shift isn't optimized to handle these large cases. Instantiating MUX manually with code like http://www.ece.ualberta.ca/~elliott/ee552/studentappnotes/2003_w/components/barrel_shifter/ works well and compile time is under 2 min with good performance (200 MHz on Stratix IV C2, 100 MHz on Cyclone V C8)